| Computer Architecture:Pipelined and Parallel Processor Design | |
| Authors: M. J. Flynn | ISBN:
978-81-7319-100-8 |
About the book Abstracts the essential elements of processor design and emphasizes a design methodology including design concepts, design target data, and evaluation tools | |
Key Features |
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Table of content Preface / Acknowledgements / Architecture and Machines / Time, Area and Instruction Sets / Data: How Programs Behave / Pipelined Processor Design / Cache Memory / Memory System Design / Concurrent Processors/ Shared Memory Multiprocessors / I / O and the Storage Hierarchy/ Processor Studies / Appendix A: DTMR Cache Miss Rates / Appendix B: SPEC Mark vs. dtmr Cache Performance / Appendix C: Modelling System Effects in Caches / Appendix D: New DRAM Technologies / Appendix E: M / G / I Queues / Appendix F: Some Details on Bus Based Protocols / Bibliography / Index. Audience Practicing Computer Designers and Students. | |
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